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We have shown that our present CPU-GPU scheduler design is capable of running Uintah
simulations on current and emerging heterogeneous systems, fully utilizing all on-node
computational resources simultaneously. However, we face significant scalability challenges inherent in
the RMCRT problem, as shown in our results. Developing a scalable approach to this problem will be a primary focus
in future work. Other aspects of the CPU-GPU scheduler will be improved upon as well.
Most notably, the centralized control thread design will need to be revised by
moving to a decentralized design \cite{Qingyu-UUSCI-2012-004}. The central control thread design
will become a severe performance bottleneck as CPU core counts on-node continue to grow.
This approach has already been taken in our multi-threaded CPU task
scheduler \cite{Qingyu-UUSCI-2012-004}, and is planned for the CPU-GPU scheduler.
This will allow any thread to fetch and execute both CPU and GPU tasks and also to send
and receive its own MPI messages. Implementing an efficient, lock-free GPU data warehouse is another
consideration as is implementing a mechanism for the CPU-GPU scheduler to decide at
runtime whether to run a particular task on a CPU core or on a GPU.
Early access to the Intel MIC \cite{intel-mic-webpage} chip is being actively
pursued, with plans to extend Uintah's scheduler to support such accelerator designs.
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